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Items: 1 to 20 of 104

1.
2.

Scaling effect on unipolar and bipolar resistive switching of metal oxides.

Yanagida T, Nagashima K, Oka K, Kanai M, Klamchuen A, Park BH, Kawai T.

Sci Rep. 2013;3:1657. doi: 10.1038/srep01657.

3.

The mechanism of electroforming of metal oxide memristive switches.

Joshua Yang J, Miao F, Pickett MD, Ohlberg DA, Stewart DR, Lau CN, Williams RS.

Nanotechnology. 2009 May 27;20(21):215201. doi: 10.1088/0957-4484/20/21/215201. Epub 2009 May 5. Erratum in: Nanotechnology. 2010 Aug 20;21(33):339803.

PMID:
19423925
4.

Magnetoelectric charge trap memory.

Bauer U, Przybylski M, Kirschner J, Beach GS.

Nano Lett. 2012 Mar 14;12(3):1437-42. doi: 10.1021/nl204114t. Epub 2012 Feb 8.

PMID:
22300444
5.

Self-assembly-induced formation of high-density silicon oxide memristor nanostructures on graphene and metal electrodes.

Park WI, Yoon JM, Park M, Lee J, Kim SK, Jeong JW, Kim K, Jeong HY, Jeon S, No KS, Lee JY, Jung YS.

Nano Lett. 2012 Mar 14;12(3):1235-40. doi: 10.1021/nl203597d. Epub 2012 Feb 10.

PMID:
22324809
6.

Ultralow contact resistance at an epitaxial metal/oxide heterojunction through interstitial site doping.

Chambers SA, Gu M, Sushko PV, Yang H, Wang C, Browning ND.

Adv Mater. 2013 Aug 7;25(29):4001-5. doi: 10.1002/adma.201301030. Epub 2013 May 6.

PMID:
23649872
7.
8.

Memristive switching mechanism for metal/oxide/metal nanodevices.

Yang JJ, Pickett MD, Li X, Ohlberg DA, Stewart DR, Williams RS.

Nat Nanotechnol. 2008 Jul;3(7):429-33. doi: 10.1038/nnano.2008.160. Epub 2008 Jun 15.

PMID:
18654568
9.

Incorporation of manganese dioxide within ultraporous activated graphene for high-performance electrochemical capacitors.

Zhao X, Zhang L, Murali S, Stoller MD, Zhang Q, Zhu Y, Ruoff RS.

ACS Nano. 2012 Jun 26;6(6):5404-12. doi: 10.1021/nn3012916. Epub 2012 May 10.

PMID:
22554307
10.

High current density and nonlinearity combination of selection device based on TaO(x)/TiO2/TaO(x) structure for one selector-one resistor arrays.

Lee W, Park J, Kim S, Woo J, Shin J, Choi G, Park S, Lee D, Cha E, Lee BH, Hwang H.

ACS Nano. 2012 Sep 25;6(9):8166-72. Epub 2012 Aug 28.

PMID:
22928469
11.

Large areal mass, flexible and free-standing reduced graphene oxide/manganese dioxide paper for asymmetric supercapacitor device.

Sumboja A, Foo CY, Wang X, Lee PS.

Adv Mater. 2013 May 28;25(20):2809-15. doi: 10.1002/adma.201205064. Epub 2013 Apr 11.

PMID:
23580421
12.

Resistance switching characteristics of HfO2 film with electrode for resistance change random access memory.

Park IS, Lee JH, Lee S, Ahn J.

J Nanosci Nanotechnol. 2007 Nov;7(11):4139-42.

PMID:
18047136
13.

High-quality metal oxide core/shell nanowire arrays on conductive substrates for electrochemical energy storage.

Xia X, Tu J, Zhang Y, Wang X, Gu C, Zhao XB, Fan HJ.

ACS Nano. 2012 Jun 26;6(6):5531-8. doi: 10.1021/nn301454q. Epub 2012 May 4.

PMID:
22545560
14.

CMOS compatible nanoscale nonvolatile resistance switching memory.

Jo SH, Lu W.

Nano Lett. 2008 Feb;8(2):392-7. doi: 10.1021/nl073225h. Epub 2008 Jan 25.

PMID:
18217785
15.

Observation of nonvolatile resistive memory switching characteristics in Ag/graphene-oxide/Ag devices.

Venugopal G, Kim SJ.

J Nanosci Nanotechnol. 2012 Nov;12(11):8522-5.

PMID:
23421239
16.

Switching the electrical resistance of individual dislocations in single-crystalline SrTiO3.

Szot K, Speier W, Bihlmayer G, Waser R.

Nat Mater. 2006 Apr;5(4):312-20. Epub 2006 Mar 26.

PMID:
16565712
17.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

Prezioso M, Merrikh-Bayat F, Hoskins BD, Adam GC, Likharev KK, Strukov DB.

Nature. 2015 May 7;521(7550):61-4. doi: 10.1038/nature14441.

PMID:
25951284
18.

Scalable one-pot bacteria-templating synthesis route toward hierarchical, porous-Co3O4 superstructures for supercapacitor electrodes.

Shim HW, Lim AH, Kim JC, Jang E, Seo SD, Lee GH, Kim TD, Kim DW.

Sci Rep. 2013;3:2325. doi: 10.1038/srep02325.

19.

Physical electro-thermal model of resistive switching in bi-layered resistance-change memory.

Kim S, Kim SJ, Kim KM, Lee SR, Chang M, Cho E, Kim YB, Kim CJ, Chung U-, Yoo IK.

Sci Rep. 2013;3:1680. doi: 10.1038/srep01680.

20.

PLL jitter reduction by utilizing a ferroelectric capacitor as a VCO timing element.

Pauls G, Kalkur TS.

IEEE Trans Ultrason Ferroelectr Freq Control. 2007 Jun;54(6):1096-102.

PMID:
17571808

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