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Items: 17

1.

Design and Optimization of Germanium-Based Gate-Metal-Core Vertical Nanowire Tunnel FET.

Jang WD, Yoon YJ, Cho MS, Jung JH, Lee SH, Jang J, Bae JH, Kang IM.

Micromachines (Basel). 2019 Oct 31;10(11). pii: E749. doi: 10.3390/mi10110749.

2.

Design Optimization of InGaAs/GaAsSb-Based P-Type Gate-All-Around Arch-Shaped Tunneling Field-Effect Transistor.

Kim BG, Seo JH, Yoon YJ, Cho MS, Kang IM.

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6762-6766. doi: 10.1166/jnn.2019.17103.

PMID:
31027025
3.

Simulation for Electrical Performances of the Capacitorless Dynamic Random Access Memory Based on Junctionless FinFETs.

Cho MS, Yoon YJ, Kim BG, Jung JH, Jang WD, Lee JH, Kang IM.

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6755-6761. doi: 10.1166/jnn.2019.17116.

PMID:
31027024
4.

Design Optimization and Analysis of InGaAs/InAs/InGaAs Heterojunction-Based Electron Hole Bilayer Tunneling FETs.

Seo JH, Yoon YJ, Cho S, Kang IM, Lee JH.

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6070-6076. doi: 10.1166/jnn.2019.17021.

PMID:
31026910
5.

Effect of Interface Traps on the Device Performance of InGaAs-Based Gate-All-Around Tunneling Field-Effect Transistors.

Jang WD, Yoon YJ, Cho MS, Kim BG, Kang DIM.

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6036-6042. doi: 10.1166/jnn.2019.17009.

PMID:
31026904
7.

Analysis of Electrical Characteristics of InAlGaN/GaN-Based High Electron Mobility Transistors with AlGaN Back Barriers.

Jung JH, Yoon YJ, Cho MS, Kim BG, Jang WD, Kang IM.

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6008-6015. doi: 10.1166/jnn.2019.17011.

PMID:
31026900
8.

Design Optimization of Ge/GaAs-Based Heterojunction Gate-All-Around (GAA) Arch-Shaped Tunneling Field-Effect Transistor (A-TFET).

Seo JH, Yoon YJ, Kang IM.

J Nanosci Nanotechnol. 2018 Sep 1;18(9):6602-6605. doi: 10.1166/jnn.2018.15705.

PMID:
29677842
9.

Simulation of One-Transistor Dynamic Random-Access Memory Based on Symmetric Double-Gate Si Junctionless Transistor.

Kim BG, Seo JH, Yoon YJ, Cho MS, Yu E, Lee JH, Cho S, Kang IM.

J Nanosci Nanotechnol. 2018 Sep 1;18(9):6593-6597. doi: 10.1166/jnn.2018.15707.

PMID:
29677840
10.

Nonlinear Transport in Organic Thin Film Transistors with Soluble Small Molecule Semiconductor.

Kim H, Song DS, Kwon JH, Jung JH, Kim DK, Kim S, Kang IM, Park J, Tae HS, Battaglini N, Lang P, Horowitz G, Bae JH.

J Nanosci Nanotechnol. 2016 Mar;16(3):2779-82.

PMID:
27455707
11.

Analyses on RF Performances of Silicon-Compatible InGaAs-Based Planar-Type and Fin-Type Junctionless Field-Effect Transistors.

Seo JH, Yoon YJ, Cho S, Tae HS, Lee JH, Kang IM.

J Nanosci Nanotechnol. 2015 Oct;15(10):7615-9.

PMID:
26726384
12.

Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

Kim SY, Seo JH, Yoon YJ, Lee HY, Lee SM, Cho S, Kang IM.

J Nanosci Nanotechnol. 2015 Oct;15(10):7486-92.

PMID:
26726356
13.

Short-Channel Tunneling Field-Effect Transistor with Drain-Overlap and Dual-Metal Gate Structure for Low-Power and High-Speed Operations.

Yoon YJ, Eun HR, Seo JH, Kang HS, Lee SM, Lee J, Cho S, Tae HS, Lee JH, Kang IM.

J Nanosci Nanotechnol. 2015 Oct;15(10):7430-5.

PMID:
26726346
14.
15.

Heteromaterial gate tunneling field-effect transistor for high-speed and radio-frequency applications.

Yoon YJ, Seo JH, Cho ES, Lee JH, Bae JH, Cho S, Kang IM.

J Nanosci Nanotechnol. 2014 Nov;14(11):8136-40.

PMID:
25958487
16.

Design and analysis of vertical-channel gallium nitride (GaN) junctionless nanowire transistors (JNT).

Seo JH, Yoon YJ, Lee HG, Yoo GM, Jo YW, Son DH, Lee JH, Cho ES, Cho S, Kang IM.

J Nanosci Nanotechnol. 2014 Nov;14(11):8130-5.

PMID:
25958486
17.

Analysis on RF parameters of nanoscale tunneling field-effect transistor based on InAs/InGaAs/InP heterojunctions.

Woo SY, Yoon YJ, Cho S, Lee JH, Kang IM.

J Nanosci Nanotechnol. 2013 Dec;13(12):8133-6.

PMID:
24266205

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