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Items: 3

1.

Notched Anchor Design for Low Voltage Operation of Nanoelectromechanical (NEM) Memory Switches.

Kang MH, Jo HC, Choi WY.

J Nanosci Nanotechnol. 2020 Jul 1;20(7):4198-4202. doi: 10.1166/jnn.2020.17789.

PMID:
31968441
2.

Active Region Formation of Nanoelectromechanical (NEM) Devices for Complementary-Metal-Oxide-Semiconductor-NEM Co-Integration.

Cha TM, Jo HC, Kwon HS, Choi WY.

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6123-6127. doi: 10.1166/jnn.2019.16988.

PMID:
31026920
3.

Encapsulation of NEM Memory Switches for Monolithic-Three-Dimensional (M3D) CMOS⁻NEM Hybrid Circuits.

Jo HC, Choi WY.

Micromachines (Basel). 2018 Jun 23;9(7). pii: E317. doi: 10.3390/mi9070317.

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