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Nano Lett. 2016 Sep 14;16(9):5378-85. doi: 10.1021/acs.nanolett.6b01542. Epub 2016 Aug 19.

Self-Aligned Multichannel Graphene Nanoribbon Transistor Arrays Fabricated at Wafer Scale.

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Device Laboratory and ‡Platform Technology Laboratory, Device & System Research Center, Samsung Advanced Institute of Technology , Suwon 16678, Republic of Korea.


We present a novel method for fabricating large-area field-effect transistors (FETs) based on densely packed multichannel graphene nanoribbon (GNR) arrays using advanced direct self-assembly (DSA) nanolithography. The design of our strategy focused on the efficient integration of the FET channel and using fab-compatible processes such as thermal annealing and chemical vapor deposition. We achieved linearly stacked DSA nanopattern arrays with sub-10 nm half-pitch critical dimensions (CD) by controlling the thickness of topographic Au confinement patterns. Excellent roughness values (∼10% of CD) were obtained, demonstrating the feasibility of integrating sub-10 nm GNRs into commercial semiconductor processes. Based on this facile process, FETs with such densely packed multichannel GNR arrays were successfully fabricated on 6 in. silicon wafers. With these high-quality GNR arrays, we achieved FETs showing the highest performance reported to date (an on-to-off ratio larger than 10(2)) for similar devices produced using conventional photolithography and block-copolymer lithography.


Graphene nanoribbon; block copolymer; directed self-assembly; field-effect transistor; nanolithography

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