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Nanoscale. 2013 Oct 7;5(19):8968-72. doi: 10.1039/c3nr02552g. Epub 2013 Aug 22.

A facile route to Si nanowire gate-all-around field effect transistors with a steep subthreshold slope.

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1
SKKU Advanced Institute of Nanotechnology, Sungkyunkwan University, Suwon, 440-746, Korea. dwhang@skku.edu.

Abstract

We present a facile CMOS-compatible fabrication of lateral gate-all-around (GAA) field effect transistors (FETs) based on concentric Si-SiO₂/N(++)Si core-multi-shell nanowires (NWs). Si-SiO₂/N(++)Si core-multi-shell NWs were prepared by sequential Si NW growth, thermal oxidation and Si deposition processes in a single chamber. The GAA NW FET was then fabricated using the Si core, SiO₂ inner-shell, N(++) Si outer-shell as a channel, gate dielectric, and gate electrode, respectively. A one-step wet etching process was able to define the gate and source-drain contact regions. The SiNW GAA FET clearly exhibits a geometry-dependent gating effect and a steep subthreshold slope due to the low interface trapped charge density at the interface of the Si core and the SiO₂ shell. Our proposed SiNW GAA structures offer new opportunities for low-energy-consumption digital device applications.

PMID:
23969942
DOI:
10.1039/c3nr02552g
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