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ACS Nano. 2013 Apr 23;7(4):3661-7. doi: 10.1021/nn400671z. Epub 2013 Mar 8.

Reducing contact resistance in graphene devices through contact area patterning.

Author information

1
IBM T.J. Watson Research Center, Yorktown Heights, New York 10598, United States. joshsmit@us.ibm.com

Abstract

Performance of graphene electronics is limited by contact resistance associated with the metal-graphene (M-G) interface, where unique transport challenges arise as carriers are injected from a 3D metal into a 2D-graphene sheet. In this work, enhanced carrier injection is experimentally achieved in graphene devices by forming cuts in the graphene within the contact regions. These cuts are oriented normal to the channel and facilitate bonding between the contact metal and carbon atoms at the graphene cut edges, reproducibly maximizing "edge-contacted" injection. Despite the reduction in M-G contact area caused by these cuts, we find that a 32% reduction in contact resistance results in Cu-contacted, two-terminal devices, while a 22% reduction is achieved for top-gated graphene transistors with Pd contacts as compared to conventionally fabricated devices. The crucial role of contact annealing to facilitate this improvement is also elucidated. This simple approach provides a reliable and reproducible means of lowering contact resistance in graphene devices to bolster performance. Importantly, this enhancement requires no additional processing steps.

PMID:
23473291
DOI:
10.1021/nn400671z
[Indexed for MEDLINE]

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