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ACS Nano. 2012 Apr 24;6(4):3371-6. doi: 10.1021/nn300393c. Epub 2012 Mar 20.

Self-aligned fabrication of graphene RF transistors with T-shaped gate.

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Department of Electrical Engineering, University of Southern California, Los Angeles, California 90089, United States.


Exceptional electronic properties of graphene make it a promising candidate as a material for next generation electronics; however, self-aligned fabrication of graphene transistors has not been fully explored. In this paper, we present a scalable method for fabrication of self-aligned graphene transistors by defining a T-shaped gate on top of graphene, followed by self-aligned source and drain formation by depositing Pd with the T-gate as a shadow mask. This transistor design provides significant advantages such as elimination of misalignment, reduction of access resistance by minimizing ungated graphene, and reduced gate charging resistance. To achieve high-yield scalable fabrication, we have combined the use of large-area graphene synthesis by chemical vapor deposition, wafer-scale transfer, and e-beam lithography to deposit T-shaped top gates. The fabricated transistors with channel lengths in the range of 110-170 nm exhibited excellent performance with peak current density of 1.3 mA/μm and peak transconductance of 0.5 mS/μm, which is one of the highest transconductance values reported. In addition, the T-gate design enabled us to achieve graphene transistors with extrinsic current-gain cutoff frequency of 23 GHz and maximum oscillation frequency of 10 GHz. These results represent important steps toward self-aligned design of graphene transistors for various applications.


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