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IEEE Trans Neural Syst Rehabil Eng. 2009 Aug;17(4):322-9. doi: 10.1109/TNSRE.2009.2023298. Epub 2009 Jun 2.

Wireless neural recording with single low-power integrated circuit.

Author information

  • 1Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT 84112, USA. harrison@ece.utah.edu

Abstract

We present benchtop and in vivo experimental results from an integrated circuit designed for wireless implantable neural recording applications. The chip, which was fabricated in a commercially available 0.6- mum 2P3M BiCMOS process, contains 100 amplifiers, a 10-bit analog-to-digital converter (ADC), 100 threshold-based spike detectors, and a 902-928 MHz frequency-shift-keying (FSK) transmitter. Neural signals from a selected amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power/command receiving coil and a 100-nF capacitor.

PMID:
19497825
PMCID:
PMC2941647
DOI:
10.1109/TNSRE.2009.2023298
[PubMed - indexed for MEDLINE]
Free PMC Article
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