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Items: 1 to 20 of 187

1.

Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers.

Carrillo S, Harkin J, McDaid L, Pande S, Cawley S, McGinley B, Morgan F.

Neural Netw. 2012 Sep;33:42-57. doi: 10.1016/j.neunet.2012.04.004. Epub 2012 Apr 23.

PMID:
22561008
2.

A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors.

Nageswaran JM, Dutt N, Krichmar JL, Nicolau A, Veidenbaum AV.

Neural Netw. 2009 Jul-Aug;22(5-6):791-800. doi: 10.1016/j.neunet.2009.06.028. Epub 2009 Jul 2.

PMID:
19615853
3.

Event management for large scale event-driven digital hardware spiking neural networks.

Caron LC, D'Haene M, Mailhot F, Schrauwen B, Rouat J.

Neural Netw. 2013 Sep;45:83-93. doi: 10.1016/j.neunet.2013.02.005. Epub 2013 Mar 6.

PMID:
23522624
4.

Compact hardware liquid state machines on FPGA for real-time speech recognition.

Schrauwen B, D'Haene M, Verstraeten D, Campenhout JV.

Neural Netw. 2008 Mar-Apr;21(2-3):511-23. doi: 10.1016/j.neunet.2007.12.009. Epub 2007 Dec 23. Erratum in: Neural Netw. 2008 May;21(4):698.

PMID:
18222634
5.

The role of the asymptotic dynamics in the design of FPGA-based hardware implementations of gIF-type neural networks.

Rostro-Gonzalez H, Cessac B, Girau B, Torres-Huitzil C.

J Physiol Paris. 2011 Jan-Jun;105(1-3):91-7. doi: 10.1016/j.jphysparis.2011.09.004. Epub 2011 Sep 21.

PMID:
21964248
6.

A forecast-based STDP rule suitable for neuromorphic implementation.

Davies S, Galluppi F, Rast AD, Furber SB.

Neural Netw. 2012 Aug;32:3-14. doi: 10.1016/j.neunet.2012.02.018. Epub 2012 Feb 14.

PMID:
22386500
7.

Real-time computing platform for spiking neurons (RT-spike).

Ros E, Ortigosa EM, Agís R, Carrillo R, Arnold M.

IEEE Trans Neural Netw. 2006 Jul;17(4):1050-63.

PMID:
16856666
8.

Spiking neural networks.

Ghosh-Dastidar S, Adeli H.

Int J Neural Syst. 2009 Aug;19(4):295-308.

PMID:
19731402
9.

Dynamically reconfigurable silicon array of spiking neurons with conductance-based synapses.

Vogelstein RJ, Mallik U, Vogelstein JT, Cauwenberghs G.

IEEE Trans Neural Netw. 2007 Jan;18(1):253-65.

PMID:
17278476
10.

Real-time classification of datasets with hardware embedded neuromorphic neural networks.

Bako L.

Brief Bioinform. 2010 May;11(3):348-63. doi: 10.1093/bib/bbp066. Epub 2010 Jan 6.

11.

Case study on a self-organizing spiking neural network for robot navigation.

Nichols E, McDaid LJ, Siddique NH.

Int J Neural Syst. 2010 Dec;20(6):501-8.

PMID:
21117272
12.

Comparison of a spiking neural network and an MLP for robust identification of generator dynamics in a multimachine power system.

Johnson C, Venayagamoorthy GK, Mitra P.

Neural Netw. 2009 Jul-Aug;22(5-6):833-41. doi: 10.1016/j.neunet.2009.06.033. Epub 2009 Jul 2.

PMID:
19616408
13.

Chaos-based mixed signal implementation of spiking neurons.

Rossello JL, Canals V, Morro A, Verd J.

Int J Neural Syst. 2009 Dec;19(6):465-71.

PMID:
20039469
14.

A robust and scalable neuromorphic communication system by combining synaptic time multiplexing and MIMO-OFDM.

Srinivasa N, Zhang D, Grigorian B.

IEEE Trans Neural Netw Learn Syst. 2014 Mar;25(3):585-608. doi: 10.1109/TNNLS.2013.2280126.

PMID:
24807453
15.

Neuron array with plastic synapses and programmable dendrites.

Ramakrishnan S, Wunderlich R, Hasler J, George S.

IEEE Trans Biomed Circuits Syst. 2013 Oct;7(5):631-42. doi: 10.1109/TBCAS.2013.2282616. Epub 2013 Oct 18.

PMID:
24144669
16.

Hardware implementation of stochastic spiking neural networks.

Rosselló JL, Canals V, Morro A, Oliver A.

Int J Neural Syst. 2012 Aug;22(4):1250014. doi: 10.1142/S0129065712500141. Epub 2012 Jul 12.

PMID:
22830964
17.

Spiking neuron computation with the time machine.

Garg V, Shekhar R, Harris JG.

IEEE Trans Biomed Circuits Syst. 2012 Apr;6(2):142-55. doi: 10.1109/TBCAS.2011.2179544.

PMID:
23852979
18.

Implementing spiking neural networks for real-time signal-processing and control applications: a model-validated FPGA approach.

Pearson MJ, Pipe AG, Mitchinson B, Gurney K, Melhuish C, Gilhespy I, Nibouche M.

IEEE Trans Neural Netw. 2007 Sep;18(5):1472-87.

PMID:
18220195
19.
20.

Performance/price estimates for cortex-scale hardware: a design space exploration.

Zaveri MS, Hammerstrom D.

Neural Netw. 2011 Apr;24(3):291-304. doi: 10.1016/j.neunet.2010.12.003. Epub 2010 Dec 23.

PMID:
21232918
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