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Nano Lett. 2012 Sep 12;12(9):4540-5. doi: 10.1021/nl3016472. Epub 2012 Aug 17.

Hierarchical three-dimensional layer-by-layer assembly of carbon nanotube wafers for integrated nanoelectronic devices.

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  • 1Nanotube Research Center, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba 305-8565, Japan.


We report a general approach to overcome the enormous obstacle of the integration of CNTs into devices by bonding single-walled carbon nanotubes (SWNTs) films to arbitrary substrates and transferring them into densified and lithographically processable "CNT wafers". Our approach allows hierarchical layer-by-layer assembly of SWNTs into organized three-dimensional structures, for example, bidirectional islands, crossbar arrays with and without contacts on Si, and flexible substrates. These organized SWNT structures can be integrated with low-power resistive random-access memory.

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