Display Settings:

Format

Send to:

Choose Destination
    IEEE Trans Neural Netw. 2006 May;17(3):745-54.

    Exploiting application locality to design low-complexity, highly performing, and power-aware embedded classifiers.

    Source

    Dipartimento di Elettronica e Informazione, Politecnico di Milano, 20133 Milano, Italy. alippi@elet.polimi.it

    Abstract

    Temporal and spatial locality of the inputs, i.e., the property allowing a classifier to receive the same samples over time--or samples belonging to a neighborhood--with high probability, can be translated into the design of embedded classifiers. The outcome is a computational complexity and power aware design particularly suitable for implementation. A classifier based on the gated-parallel family has been found particularly suitable for exploiting locality properties: Subclassifiers are generally small, independent each other, and controlled by a master-enabling module granting that only a subclassifier is active at a time, the others being switched off. By exploiting locality properties we obtain classifiers with accuracy comparable with the ones designed without integrating locality but gaining a significant reduction in computational complexity and power consumption.

    PMID:
    16722177
    [PubMed - indexed for MEDLINE]

      Supplemental Content

      Icon for IEEE Engineering in Medicine and Biology Society

      Save items

      loading

      Recent activity

      Your browsing activity is empty.

      Activity recording is turned off.

      Turn recording back on

      See more...
      Write to the Help Desk